Lake Forest, Illinois, August 2004 - Announced today by Associated Research, Inc is the attainment of U.S patent number 6,744,259. This patent covers the VERI-CHEK® feature found in Associated Research electrical safety testers. The VERI-CHEK feature is an internal verification system that allows manufacturers to quickly and easily validate the operation of their safety testers. Verification of failure detect circuitry of an electrical safety tester is required by various safety agencies including UL, TÜV, and the International Electrotechnical Commission among others. Verification is required to validate that the tester will detect a fail conduction in a Device Under Test (DUT). This patented technology provides manufacturers with a cost-effective method to perform these verification tests.

The VERI-CHEK uses a graphic display and built-in prompt messages to walk the test operator through the required steps to verify the fail detect circuitry of the electrical safety tester. The feature can be enacted or bypassed each time the electrical safety tester is powered up. Once enacted, the electrical safety tester will display detailed prompt messages instructing the operator on the proper steps needed to perform the verification test. After the verification test is performed the display will give a visual confirmation of the test results. If the verification test yields failure results, appropriate follow up action is detailed. Functions that can be verified include AC Hipot, DC Hipot, Ground Continuity, Ground Bond and Insulation Resistance.

The VERI-CHEK feature is only found on Associated Research electrical safety testers. Associated Research products that contain the VERI-CHEK feature include all models in the following product families: OMNIA, HypotULTRA III, Hypot III, and HYAMP III.

Founded in 1936, Associated Research, Inc. is a worldwide leader in Electrical Safety Compliance Testing Instruments.